1. Field of the Invention
This invention relates to microprocessor systems having improved performance characteristics.
2. Description of the Prior Art
In microcoded machines, it is common to separate the routines between effective address calculation and execution. It is desirable that as many instructions as possible share as many common effective address and execution routines as possible. However, register-to-register instructions have their operands in registers, where memory-to-register instructions have one of their operands in a Memory Data Register (MDR). This makes sharing the execution microroutine impossible without performance penalties, because at the start of the execution routine the source of the operands is different depending on the type of instruction (memory-to-register or register-to-register).